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From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. Lastly, the candidate should also have experience leading and mentoring junior engineers, and coordinating engineering tasks.Īt Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. Using these communications skills the candidate would be able to produce reports and presentations to internal and customer audiences or standards bodies. In addition to strong technical abilities, the position requires excellent written and verbal communication skills that will be utilized for developing design specifications and fostering collaboration. Oscillators, DLLs) as well as the protocols running over the network (e.g. Experience should include understanding of the physical elements in such systems (e.g.

In addition, candidates should have experience with the design of Time Sensitive Networking (TSN) systems. It is expected that the candidate will have had experience in the design and deployment of timing distribution solutions for wireless, transport or other high-accuracy applications. In addition to leading IP developments, the Architect will engage in proof of concept demonstrations and development of industry standards. The Timing Solution Architect will work with Xilinx’s customers and internal engineering teams to define next generation time distribution IP solutions and Time Sensitive Networking IP.

The demands of 5G wireless and IIoT applications are pushing the bounds of timing accuracy and quality of service within wired communications. The successful candidate will join our development team, creating ASIC and FPGA-based intellectual property and Software to address the needs of state-of-the-art communications systems. Xilinx is looking for a talented individual to join the Wired IP Solutions Group (WISG) in the position of Networking Timing Solution Architect.